Dr. Sivanantham S

Designation : Professor Grade 2
School / Centre : School of Electronics Engineering
Department : Micro & Nanoelectronics

Educational Details

Vellore Institute of Technology

Ph.D.
VLSI Design and Testing
Graduated in 2014

SASTRA University

M.Tech
VLSI Design
Graduated in 2002

University of Madras

B.E
Electronics and Communication Engineering
Graduated in 1997

Research Details

Areas of Specialization
  • VLSI Testing and Testability
  • Low power VLSI architectures
  • FPGA based System Design
  • Video coding standards Applications of Machine Learning in VLSI Design and Test

: http://orcid.org/0000-0002-1010-5178
: https://www.scopus.com/authid/detail.uri?authorId=52664322300
: https://scholar.google.co.in/citations?user=2edwuVEAAAAJ&hl=en
: 8
: 9

Completed Funded Project Details

Title Funding Agency
Design and Development of a Multi-Purpose Reversible Data Hiding in Wavelet Domain for Defence Applications – DRDO, New Delhi

Books / Book Chapters Published Details

Title Publisher Published Year
"Optimized-Fuzzy-Logic-Based Bit Loading Algorithms." In Handbook of Research on Fuzzy and Rough Set Theory in Organizational Decision Making, Hershey, PA: IGI Global 2017
Jo An Efficient Algorithm for Tracing Minimum Leakage Current Vector in Deep-Sub Micron Circuits. In: Advanced Computing and Communication Technologies. Advances in Intelligent Systems and Computing, Springer, Singapore. 2016

Industry Collaborations

  • Mentor - A Siemens Business